Senior Digital Test Engineer-SCAN/MBIST (Zhubei)
Core
Senior Digital Test Engineer driving SoC/Chiplet test program bring-up and validation from NPI through high-volume manufacturing, focusing on structural test (SCAN/ATPG/MBIST) and debugging test issues.
Role type
Senior IC Digital Test Engineer (SoC/Chiplet)
Builds
SoC and Chiplet test programs for high-volume manufacturing
Domain
Semiconductor / Hardware Engineering / Digital Test
Required skills
Structural test (SCAN/ATPG/MBIST), SoC/Chiplet test bring-up, Test platform operation (Advantest 93K/Teradyne), Test data analysis (O+/Data Power/Exensio), Scripting (C++/VB/Java/Python), Cross-functional collaboration
Preferred skills
Chiplet test strategy definition, D2D interface testing, Advanced technology node experience, AI-assisted test automation, Version control (Git/SVN), Issue tracking (JIRA)
Technologies
Advantest 93K, Teradyne UltraFLEX/iFlex, O+, Data Power, Exensio, JMP, Git, SVN, JIRA
Responsibilities
Develop and validate SoC/Chiplet test programs across NPI and HVM stages; Debug and resolve coverage, yield, and test escape issues; Optimize test efficiency and cost; Analyze test and yield data for root cause identification; Collaborate with DFT, Design, Yield, and Manufacturing teams.
Seniority
Senior, hands-on IC
