CareerPlan

Engineer, Yield Enhancement Laboratory

Singapore, SingaporeFull-time2026-09-10 → 2026-11-10

Core

Investigate and solve complex yield, quality, and technology challenges for advanced memory products using electrical and physical failure analysis.

Role type

Senior IC yield enhancement laboratory engineer

Builds

Advanced memory products (DRAM, NAND, NOR)

Domain

Semiconductor manufacturing / Memory technology

Deliverable

production ML models

Required skills

Semiconductor device physics, failure analysis (EMMI, OBIRCH, SEM, FIB, TEM, nanoprobing), root cause analysis, process engineering, design engineering, AI tool integration

Preferred skills

Semiconductor industry experience, leadership, shift-based manufacturing flexibility

Technologies

EMMI, OBIRCH, Thermal Analysis, SEM, FIB, TEM, nanoprobing

Responsibilities

Perform fault isolation and failure characterization to identify failure mechanisms; Apply knowledge of semiconductor device physics to establish root causes; Partner with Product Engineering, Design, and R&D teams to identify design marginalities; Generate innovative solutions and develop new analytical methodologies; Support new technology introduction, yield ramp, and product qualification; Drive continuous improvement initiatives for analytical capability and efficiency

Seniority

Senior, hands-on IC