Sr Design Readiness Engineer
Core
Lead pre-silicon readiness activities for new DRAM products, bridging design intent, validation execution, silicon learning, and product readiness decisions.
Role type
Senior IC Design Readiness Engineer (Semiconductor/DRAM)
Builds
New DRAM memory products
Domain
Semiconductor industry, DRAM technology, silicon validation
Required skills
semiconductor device behavior analysis, circuit analysis, validation methodology, signal integrity, test development, reliability engineering, root-cause analysis, experiment planning, risk assessment, cross-functional leadership, technical mentoring
Preferred skills
PhD or MS in EE/CS/Semiconductor, experience with AI-enabled tools for engineering analysis, experience shaping cross-functional engineering practices
Technologies
DRAM, silicon validation tools, circuit debug tools, AI-enabled engineering tools
Responsibilities
Lead pre-silicon readiness activities including risk assessment and DFMEA preparation; Partner with Design, Verification, and Product Engineering teams to identify risks and align debug priorities; Analyze circuit behavior, silicon data, and failure signatures to drive investigation and resolution; Influence product readiness decisions by connecting design intent with manufacturing constraints; Mentor engineers and strengthen technical practices across DRAM programs.
Seniority
Senior, hands-on IC with technical leadership