Principal Engineer, IO Design
Core
Design, optimize, and verify high-speed IO and clocking circuits for new DRAM memory products, pushing speed limits and analyzing impairments.
Role type
Principal IC analog/mixed-signal design engineer (IO/Clocking)
Builds
High-speed IO and clocking circuits for DRAM products
Domain
Semiconductor / Memory / Analog & Mixed-Signal
Required skills
Analog and mixed-signal circuit design, High-speed circuit design, Device physics, CMOS processing, Circuit simulation (Cadence), Layout practices, UNIX
Preferred skills
Transceiver design, Channel modeling, Timing budget analysis, Equalization techniques, SI knowledge, Python/Perl scripting, AI/ML usage, Mentoring
Technologies
Cadence, UNIX, Python, Perl
Responsibilities
Innovate, design, optimize and verify high-speed IO and clocking circuits; Apply high-speed circuit design techniques to evaluate IO data path and clocking path; Develop modeling, analysis and simulation methodology; Work with Product Engineering and SI team to compare silicon performance with simulation; Collaborate with process integration and transistor modeling teams.
Seniority
Principal, hands-on IC with mentorship