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Power Engineer (RTL Design)

💼 Full-time🗓 2026-08-09 → 2026-08-14

Core

RTL Design and Verification engineer specializing in power profiling, automation, and building runtime power models using Machine Learning.

Role type

Senior IC RTL Design and Verification Engineer (Power)

Builds

ASIC/SOC IP blocks with optimized power consumption

Domain

Semiconductor / Hardware Design / Power Efficiency

Deliverable

production ML models | product features

Required skills

RTL design and verification, power profiling (PPRTL/PTPX), Python scripting, TCL scripting, hardware telemetry analysis, data processing

Preferred skills

Machine Learning model application in hardware optimization

Technologies

PPRTL, PTPX, Python, TCL

Responsibilities

Run power tests on RTL designs and verify test behavior matches intent; utilize tools to perform comprehensive power profiling and identify optimization opportunities; develop Python/TCL scripts for automation and data extraction; analyze profiling data and generate reports for the design team; collaborate with architects to build runtime power models using ML techniques.

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