Staff Engineer - Design Verification
Core
Design Verification Engineer responsible for verifying digital and mixed-signal SoC designs for low-power IoT and AI edge applications.
Role type
Staff Engineer - Design Verification
Builds
Low-power semiconductor chips (SoCs) for wearables, medical devices, and IoT products.
Domain
Semiconductor / Low-power SoC Design / IoT
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, Verilog, C/C++, Python, Perl, Makefile, ARM/RISC-V architecture, AMBA protocols (AXI/AHB/APB), DMA, Flow Control, Serial Devices, CPF/UPF power-aware methodology, 3rd party IP integration, mixed-signal verification, low-power design techniques, automated test environment creation, root-cause analysis, coverage metrics definition.
Preferred skills
Edge-based AI inference verification, peripheral modules (UART, SPI, I2C, USB, OTP, Crypto), Audio/Display subsystems, C-based verification in SoC environment.
Technologies
SystemVerilog, UVM, Verilog, C, C++, Python, Perl, Makefile, ARM, RISC-V, AMBA, CPF, UPF
Responsibilities
Develop test plans at block, sub-system, and chip levels; Execute full-chip and module-level verification; Architect and implement scalable test benches; Develop comprehensive test cases, stimulus generation, and checkers; Automate test environments for randomized testing and score-boarding; Utilize advanced debugging and root-cause analysis; Define and track functional and code coverage metrics; Collaborate with design, architecture, and software teams; Manage verification deliverables, milestones, and schedules.
Seniority
Staff, hands-on IC with strategic ownership
