Design layout Engineer
Core
Physical implementation of advanced NAND Flash products using analog, custom digital, and mixed-signal circuits with a focus on automation and AI-assisted methodologies.
Role type
Senior IC Layout Design Engineer (NAND Flash)
Builds
Scalable, manufacturable, and reliable NAND Flash memory products
Domain
Semiconductor / Memory / Analog & Mixed-Signal Design
Deliverable
production ML models | product features
Required skills
Analog/mixed-signal/custom digital layout, floorplanning, placement, routing, parasitic-aware optimization, parasitic extraction, simulation correlation, tape-out revisions, AI-assisted design methodologies, data-driven optimization, EM/ESD/latch-up/HV design constraints
Preferred skills
NAND Flash/non-volatile memory technology, Python scripting for automation, silicon validation/bring-up/yield improvement
Technologies
Cadence Virtuoso, Calibre LVS/DRC
Responsibilities
Design and implement complex analog, mixed-signal, and custom digital layout blocks; Perform layout integration activities including floorplanning, placement, routing, and parasitic-aware optimization; Support design validation through parasitic extraction, simulation correlation, silicon learning, and tape-out revisions; Collaborate with multi-functional teams to ensure manufacturability, quality, and performance targets; Develop and drive automation and AI-assisted layout methodologies; Contribute to methodology improvement and user documentation
Seniority
Senior, hands-on IC