CareerPlan

SMTS Engineer, Adv DRAM PI

Boise, Idaho, United States of AmericaFull-time2026-11-10 → 2026-11-11

Core

Lead process integration activities to enable manufacturable next-generation memory technologies, including charge-storage devices and thin-film transistors.

Role type

Senior Process Integration Engineer (Emerging Memory)

Builds

Next-generation memory technologies (DRAM, NAND, emerging memory) for manufacturing

Domain

Semiconductor / Memory / Process Integration

Required skills

Semiconductor device physics, Process integration, Process development, Yield improvement, Data analysis, Project management

Preferred skills

DOE, Statistical techniques, AI-assisted analytics, Emerging memory technologies, Multi-functional team leadership

Technologies

300mm R&D environment, Charge-storage devices, Thin-film transistors (TFTs), Inline data, Defect data, Parametric data, Probe data