Staff Engineer - ASIC SOC Verification
Core
Create SoC verification plans and develop SV/UVM-based testcases, monitors, and flows for ASIC verification including test controller, MBIST, and functional vectors.
Role type
Staff IC ASIC SOC verification engineer
Builds
Verification environments, test vectors, and characterization flows for memory and storage SoCs
Domain
Semiconductor / Memory and Storage / ASIC Design
Required skills
SystemVerilog, UVM, Python, Perl, TCL, constrained random testing, debugging, ATE/Functional Characterization, MBIST, Test Controller architecture
Preferred skills
PCIE, LPDDR, ONFI/NAND interfaces, AI tools and methodologies
Technologies
SystemVerilog, UVM, Python, Perl, TCL
Responsibilities
Create SoC Verification plan and develop C/SV/UVM based SoC verification tests; Develop SV/UVM monitors to measure performance and improve Verification Environment; Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement; Develop flows to automate verification environment development and drive team; Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization
Seniority
Staff, hands-on IC
