Senior Manager IP Design
Core
Leading an IP circuit design group in India to develop critical analog and digital IP circuits for DRAM memory products.
Role type
Senior Manager, Analog/Digital IC Design
Builds
Analog and digital IP circuits (I/Os, voltage regulators, oscillators, DLLs, control logic) for next-leading-edge DRAM processes.
Domain
Semiconductor / Memory / DRAM
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog CMOS design, Digital CMOS design, Circuit simulation, Layout verification, Parasitic extraction, Circuit optimization, Team leadership, Device physics understanding, UNIX, Cadence environment (Simulation, Schematic, SPF), Finesim, HSpice, Power network analysis
Preferred skills
DRAM circuit design, DRAM array knowledge, CMOS processing techniques, AI tool integration
Technologies
Cadence, UNIX, Finesim, HSpice
Responsibilities
Lead IP circuit design group for DRAM products, Guide team on analog and digital IP circuits, Verify silicon performance vs simulation, Collaborate with Product Engineering, Process integration, and transistor modeling, Mentor teams on AI tool usage
Seniority
Senior, hands-on IC