Rust SW-Silicon Co-verification Engineer
Core
Write Rust tests to verify software models and hardware design agree with each other and specifications, building test infrastructure and harnesses for chip verification.
Role type
Rust SW-Silicon Co-verification Engineer
Builds
Test infrastructure and harnesses connecting software models to hardware designs for GenAI silicon
Domain
Semiconductor / Hardware Verification / GenAI
Deliverable
production ML models
Required skills
Rust (production level, ownership, traits, generics, enums, Result, borrow checker), low-level systems concepts (memory layout, concurrency, bit manipulation), test infrastructure development, specification analysis
Preferred skills
Hardware experience (FPGA, embedded, robotics), Rust FFI, Bluespec (BH/BSV), formal methods, model checking, property-based testing, computer architecture knowledge
Technologies
Rust, Bluespec, proptest, Kani
Responsibilities
Write Rust tests verifying software-hardware agreement, build scalable test infrastructure, develop hardware connection harnesses, design targeted and randomized tests for corner cases, collaborate with architects to define testable properties
Seniority
Mid to Senior (Early/Mid/Senior Career levels mentioned)
