Design Verification Engineer Intern - Fall 2026
Core
Verify circuitry inside high-speed data transfer chips for general market and specific customers (telecom, automotive) to ensure designs meet specifications.
Role type
Design Verification Engineer Intern
Builds
Functional blocks and subsystems for AI, data movement, memory/storage, switch, and networking applications
Domain
Semiconductor ASIC design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Verilog/System Verilog, digital logic, computer architecture, ASIC design/verification methodologies
Preferred skills
Ethernet, cryptographic technologies
Technologies
Verilog, System Verilog
Responsibilities
Work with engineers on design of functional blocks and subsystems; Verify and validate block requirements for area, power, performance and latency; Assist with verification of different subsystems and full chip verification groups; Work with design engineers to fix design bugs and physical design engineers to fix timing issues; Write clear and concise documentation the approach to verify design; Collaborate with cross-functional team consisting of architects, designers, verification, and software engineers
Seniority
Intern
