Analog Layout Manager
Core
Lead a team of senior layout designers to develop advanced High-Speed SerDes (HSS) IPs and Analog Mixed-Signal (AMS) solutions for Marvell's semiconductor products.
Role type
Senior IC Analog Layout Manager
Builds
High-Speed SerDes PHYs, Switch, Storage, and Optics IPs
Domain
Semiconductor / Analog Mixed-Signal Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout design, team leadership, floor planning, LVS/DRC debugging, Calibre report interpretation, Synopsys/Cadence tools, Skill/TCL/Perl scripting, project risk management
Preferred skills
FinFET process technology experience, advanced process technology knowledge
Technologies
Synopsys, Cadence, Calibre, Skill, TCL, Perl
Responsibilities
Lead a team of full-time and contract senior layout designers; Assess schedules, floor plans, and risks for analog macros; Perform hands-on work at the macro level layout; Manage and track layout schedules; Identify and prioritize project tasks and risks; Work with CAD, tech, and circuit design teams to synchronize layout schedules
Seniority
Senior, hands-on IC with management responsibilities
