Low-Voltage to Medium-Voltage Silicon MOSFET Design Engineer
Core
Design, simulate, and optimize next-generation low-voltage to medium-voltage silicon MOSFETs with a focus on shielded gate structures to improve performance metrics like Rds(on) and switching losses.
Role type
Senior IC power device design engineer
Builds
High-performance discrete power silicon devices
Domain
Semiconductor manufacturing / Power electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor device physics, Synopsys TCAD (Sentaurus), 2D/3D device simulation, layout design rules, process integration, electrical characterization, breakdown voltage analysis, thermal behavior modeling
Preferred skills
Discrete power packaging technologies, reliability mechanisms (shield oxide integrity, electromigration), high-temperature stress testing, power electronics applications
Technologies
Synopsys TCAD, Sentaurus
Responsibilities
Drive architecture and optimization of shielded gate trench structures; perform extensive 2D/3D process and device simulations; define layout design rules and generate mask layouts; partner with process integration to define process flows and ensure manufacturability; analyze electrical test data to validate models and troubleshoot performance issues
Seniority
Senior, hands-on IC