CareerPlan

SiC Wafer & Package Technology Development Engineer

Hsinchu City, TaiwanFull-time2026-09-29 → 2026-11-10

Core

Lead qualification and development of SiC die sales and next-generation SiC technologies, ensuring they meet cost, performance, manufacturing, timeline, and reliability goals for customers.

Role type

Senior IC technology development engineer (SiC packaging)

Builds

Next generation SiC technologies and qualified SiC die packages

Domain

Semiconductor industry + SiC power device packaging

Required skills

Package design, wafer thinning, sputter, electroplating, electroless plating, photolithography, wafer bonding, wirebond, sintering, die attach, clip attach, reflow, molding, material interactions, project leadership, cross-functional team management

Preferred skills

MS in Material Science, Chemical Engineering, or Semiconductor Processes

Technologies

SiC, wirebond, sintering, die attach, clip attach, reflow, molding

Responsibilities

Qualify SiC die sales and development, lead technology development through cross-functional teams, document findings and process flows, lead maturity gate reviews, update customer assembly application notes

Seniority

Senior, hands-on IC