Sr Principal AI_Cld_BLR
Core
Senior Principal Digital Design Engineer leading end-to-end development of Power Management (PMD) products including DC-DC PMIC, multiphase controllers, and SiC drivers for consumer, industrial, and automotive applications.
Role type
Senior Principal IC Digital Design Engineer (Power Management)
Builds
PMICs, multiphase controllers, SiC drivers, and related digital IPs/Socs
Domain
Semiconductor / Power Management ICs
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Digital design architecture, RTL design, low power design, synthesis and timing analysis, Physical Design, System Verilog, UPF, P&R, micro-architecture implementation, platform-based development, digital architecture trade-offs (power/performance/area), microprocessor interconnects
Preferred skills
Experience with RTL2GDS flows, Perl/Python/XML programming, CDC analysis
Technologies
Verilog, TCL, Perl, Python, XML, System Verilog, UPF, RTL2GDS
Responsibilities
Generate architecture/micro-architecture for PMD products, own IP/Soc development, deploy platform front-end tool flows, implement micro-architecture to RTL, collaborate with analog/digital design and verification teams, release complex ICs to market
Seniority
Senior, hands-on IC