Principal Engineer, Digital Design (IO Subsystem)
Core
Architecting and delivering a highly configurable IO subsystem for onsemi's microcontroller platform to enable scalability and product differentiation.
Role type
Principal Digital Design Engineer (IO Subsystem)
Builds
IO subsystems for microcontroller platforms
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models
Required skills
SystemVerilog RTL design, Python for design automation, UVM verification, synthesis and STA flows, DFT integration, PPA optimization, design automation strategy
Preferred skills
IO subsystem architecture for microcontrollers/SoCs, hardware construction frameworks, AI/ML in hardware design, automated testbench generation, safety-critical design experience
Technologies
SystemVerilog, Python, UVM, UPF
Responsibilities
Define subsystem-level specifications and integration strategy; implement parameterized and Python generator-based design approaches; develop high-quality SystemVerilog RTL; drive PPA optimization while maintaining configurability; establish best practices for design automation and methodology standardization
Seniority
Principal, technical leader & cross-functional influence
