硬件开发-AI核设计方向(北京/上海/深圳)
Core
Design AI core microarchitecture, RTL implementation, timing analysis, and PPA optimization.
Role type
Senior IC hardware design engineer (AI core)
Builds
AI processor cores
Domain
Semiconductor / AI hardware
Deliverable
production ML models
Required skills
Microarchitecture design, RTL design (Verilog/VHDL), Timing analysis, PPA optimization, ASIC/FPGA design flow, EDA tools (Cadence/Synopsys), C/C++/Python programming
Preferred skills
Processor architecture knowledge, Memory interface design, Bus interface design
Technologies
Verilog, VHDL, Cadence, Synopsys, Mentor Graphics, C, C++, Python
Responsibilities
Design AI core microarchitecture and RTL, Optimize timing and performance, Support system integration and documentation, Collaborate on performance improvement and verification planning
