Formal Verification Engineer
Core
Apply model checking and formal property verification to RTL blocks, memory subsystems, and interconnects; develop machine-checked proofs for compiler transformations; embed hardware description languages and simulator models into interactive theorem provers to prove functional correctness.
Role type
Senior IC formal verification engineer (hardware/software stack)
Builds
Hardware and software stack for efficient AI model execution
Domain
AI hardware acceleration, compiler correctness, formal methods
Deliverable
production ML models | infrastructure
Required skills
hardware model checking, SVA/PSL property writing, interactive theorem provers (Lean, Coq, Isabelle/HOL, Agda), language/IR embedding into theorem provers, compiler correctness proofs, RTL microarchitecture understanding
Preferred skills
verified compilation experience (CompCert-style), translation validation, SymbiYosys usage
Technologies
JasperGold, VC-Formal, Lean 4, Rocq, Isabelle/HOL, SymbiYosys
Responsibilities
Apply model checking and formal property verification to RTL blocks and memory subsystems; develop and maintain machine-checked proofs for critical compiler transformations; build embeddings of hardware description languages into interactive theorem provers; collaborate with architecture and silicon teams to identify correctness properties; drive methodology for integrating formal tools into existing practices
Seniority
Senior, hands-on IC
