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Failure Analysis Engineer

Hanoi, Vietnam💼 Full-time🗓 2026-08-19 → 2026-09-25

Core

Drive improvements in fault duplication and isolation accuracy for hardware and software field issues in high-speed networking products.

Role type

Senior Failure Analysis Engineer (Hardware/Signal Integrity)

Builds

Reliable Cisco networking products and services

Domain

Networking hardware, high-speed interfaces, signal integrity

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

High-speed board design, schematics generation, design validation, SERDES system design, signal integrity analysis, power distribution techniques, defect detection, root cause analysis, EMS partner coordination, test strategy development

Preferred skills

FPGA design, CPU bring-up, unit test methodologies, agile working environment, eCAD tool proficiency

Technologies

Cadence Allegro, Intel, AMD, PCIe switches, PHY, retimers, voltage regulators, SERDES (>=25G)

Responsibilities

Drive improvements in fault duplication and isolation accuracy; Provide directions and techniques on customer issues; Engage Design engineering and communicate findings and resolutions for HW and SW field issues; Coordinate Failure Analysis cases review meetings; Perform defect detection and containment analysis; Articulate key technical issues to stakeholders; Ensure EMS partners deliver timely and accurate results; Drive innovation in new technology/processes; Organize and track design, component, and manufacturing issues; Evolve Product debug documents over the Product Life Cycle; Collaborate with PQE/CEs to drive Corrective/Preventive actions; Participate in initiatives to enhance test strategies and diagnostic coverage

Seniority

Senior, hands-on IC

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