Mixed-Signal Design Developer
Required skills
Bachelors + 12 years experience, Masters + 8 years experience, PhD + 5 years experience, High-speed IC design, SerDes/serial links, Output drivers, Phase Locked Loops (PLLs), Clock distribution, Opamps/PGAs, Equalization techniques, Signal integrity, Power integrity, High-frequency layout, Design for manufacturability, ESD practices, Test setup construction, Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, Matlab.
Preferred skills
Electrical transceiver applications, Backplane and cable communications, FinFET and GAA technologies, Floorplaning, Passives components (inductors, transformers, transmission lines), PVT characterization, Electromigration analysis, Self-heating analysis, IR drop analysis.
Responsibilities
Architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products, Lead efforts for a large block on a complex chip, Mentor team members, Track deliverables, Participate in peer review of complex IC designs, Collaborate with packaging and hardware design teams.
Seniority
Senior
Domain
Mixed-Signal Design, Optical Communications, ASIC Design, High-Speed SerDes