ASIC Engineering Technical Leader
Core
Lead ASIC design and architecture for high-performance, high-volume Enterprise and Service Provider chips, managing the full development cycle from specification to tape-out and validation.
Role type
Senior IC ASIC Engineering Technical Leader
Builds
Complex ASIC/SoC chips for Cisco Enterprise and Service Provider networking solutions
Domain
Semiconductor / Networking Hardware
Deliverable
production ML models | product features (via careerplan.io/jobs/2008269-asic-engineering-technical-leader-at-cisco)
Required skills
RTL design (Verilog, SystemVerilog), ASIC/SoC development lifecycle, timing analysis, power optimization, flow automation, system debug, SW/HW bringup, gate-level synthesis, scripting (Python, C, C++, Perl)
Preferred skills
Architecture definition for high-scale ASICs, formal verification, linting, CDC, system testing, team leadership
Technologies
VCS, Spyglass, Makefiles
Responsibilities
Architectural work including problem identification and solution design; manage implementation aspects including specification, design, timing-analysis, and power/area optimization; document and improve standard methodologies for product success
Seniority
Senior, hands-on IC
