CareerPlan

Design Verification Engineer - Camera

Israel, IsraelFull-time2026-11-04 → 2026-11-10

Core

Develop verification test plans, test benches, tools, and infrastructure for complex, large-scale media IPs to ensure high quality, performance, and power efficiency.

Role type

Senior IC design verification engineer (media IP)

Builds

High-quality media IP and systems for Apple hardware products

Domain

Semiconductor / SoC Design / Media IP

Required skills

SoC verification, media IP verification, system-level architecture understanding, coverage-driven verification, scripting (Python, Perl, SystemVerilog, C++, TCL), UVM familiarity

Preferred skills

Hardware acceleration knowledge, advanced verification environments

Technologies

SystemVerilog, UVM, Python, Perl, C++, TCL, SoC/Media IP

Responsibilities

Develop verification test plans, test benches, tools, and infrastructure; Apply advanced verification techniques to find system architecture bugs; Work closely with design and architecture teams from early feature definition; Accelerate verification time; Involve in Post Silicon Validation

Seniority

Mid-level, hands-on IC