CareerPlan

Design Verification

Cupertino, United States of AmericaFull-time$150k–$225k2026-11-05 → 2026-11-10

Core

Develop effective verification plans, test benches, and tests to verify hardware design functionality and performance goals.

Role type

Senior IC design verification engineer (hardware/ASIC)

Builds

Hardware designs (ASICs) and verification flows

Domain

Semiconductor / Hardware Design / VLSI

Required skills

System Verilog, UVM, Python scripting, C/C++, Digital Logic Design, VLSI, RTL simulation, Coverage analysis, Bug tracking, Test automation

Preferred skills

N/A

Technologies

System Verilog, UVM, Python, Perl, C, C++, CAD software, Digital Logic Design tools

Responsibilities

Develop verification plans, test benches, and tests; Implement assertions and automate verification flows; Run simulations and triage regressions; Analyze coverage and update tests to close gaps; Track bugs until closure.

Seniority

Senior, hands-on IC