FE Engineer
Core
Develop, assess, and refine RTL design for high-performance CPU micro-architecture to meet power, performance, area, and timing goals.
Role type
Senior IC CPU micro-architecture engineer
Builds
Next-generation CPU designs and micro-architectural features
Domain
Semiconductor / Computer Architecture / VLSI
Required skills
Verilog, RTL design, out-of-order processor architecture, VLSI, branch prediction, cache hierarchy, C++, Python, Perl, power-performance modeling
Preferred skills
N/A
Technologies
Verilog, C++, Python, Perl
Responsibilities
Perform micro-architecture development and specification from high-level exploration to detailed design; Develop and refine RTL to target power, performance, area, and timing; Work with verification teams to ensure functional correctness and performance; Implement CPU design modules and explore new micro-architectural features; Optimize power consumption and timing closure with physical design teams.
Seniority
Senior, hands-on IC
