CareerPlan

Design Verification Engineer

Cupertino, United States of AmericaFull-time$174k–$225k2026-11-05 → 2026-11-10

Core

Develop verification environments, test benches, and coverage plans for Apple's first silicon SoC/IP to ensure bug-free hardware.

Role type

Senior IC design verification engineer (SoC/IP)

Builds

First silicon SoC and IP blocks

Domain

Semiconductor hardware design and verification

Required skills

System Verilog, UVM, C, C++, Python, Perl, EDA tools, high-speed interface protocols, digital design, computer architecture

Responsibilities

Develop scalable verification environments with stimulus, checkers, assertions, and trackers; create and execute verification plans for design bring-up and regression; debug test failures; track and report DV progress using metrics like bugs and coverage.