Design Engineer
Core
Develop multiple IPs for Apple SoCs in Storage, Computer Vision, and RISC-V CPU domains, handling micro-architecture definitions, RTL coding, block-level simulations, and synthesis.
Role type
Senior IC VLSI design engineer (SoC/Processor)
Builds
Control-oriented IPs integrated into Apple SoC sub-systems
Domain
Semiconductor / VLSI / SoC Design
Required skills
VLSI design of Processor Cores/SoC, RTL coding, micro-architecture definition, block-level simulation, synthesis, STA, scripting (Perl, C, Python, TCL), Verilog/System Verilog
Preferred skills
Low Power Design, Clock/Voltage domain crossing, verification methodologies, CPU/ARM instruction set knowledge, backend tools familiarity
Technologies
Verilog, System Verilog, Perl, C, Python, TCL, RTL, SoC, RISC-V, ARM
