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Design Verification Engineer

Cupertino, United States of America💼 Full-time💰 $150,400–$150,400🗓 2026-09-17 → 2026-09-28

Core

Develop and integrate verification plans, testbenches, and test infrastructure for High-Efficiency SOC architectures and standard peripherals to achieve coverage targets.

Role type

Design Verification Engineer (SOC)

Builds

System-on-Chip (SOC) designs including multi-processor systems, memory controllers, and communication interfaces

Domain

Semiconductor / Digital IC Design

Required skills

Verilog, C/C++, digital circuit design, microprocessor architecture, computer networking, Unix/Linux, Python scripting, object-oriented programming, parallel computing concepts

Preferred skills

N/A

Technologies

Verilog, C/C++, Python, Unix/Linux, SPI, I2C, UART, DMA, DDR, PCIe, USB, PLL

Responsibilities

Create coverage driven verification plans from specifications; Architect highly reusable test benches and integrate complex multi-instance VIPs; Work with design, architecture, SW, FW, and external IP delivery teams to verify overall SOC design; Collaborate with DV methodology architects to improve verification flow

Seniority

Mid-Senior, hands-on IC

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