ASIC Design Engineer — Neural Engine DMA
Core
Design high-performance DMA subsystem blocks to move data between memory and the Apple Neural Engine for on-device AI capabilities.
Role type
Senior IC ASIC Design Engineer (DMA)
Builds
DMA subsystem blocks for Apple Neural Engine
Domain
Semiconductor / Hardware Design
Deliverable
production ML models
Required skills
RTL design (Verilog/SystemVerilog), microarchitecture specification, synthesis, timing closure, power analysis, design verification, on-chip bus protocols (AMBA AXI/AHB/APB), scripting (Python/Perl/Tcl)
Preferred skills
DMA microarchitecture design, SoC front-end RTL tapeout experience, hardware compression, networking SoCs, image/video processing, AI/ML accelerators
Technologies
Verilog, SystemVerilog, Python, Perl, Tcl, AMBA AXI, AHB, APB
Responsibilities
Own DMA blocks from microarchitecture specification through tapeout; write parameterized RTL with assertions and cover points; collaborate on microarchitectural trade-offs; work with verification teams to ensure functional correctness
Seniority
Senior, hands-on IC
