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Power & Performance Engineer - Platform Architecture

Santa Clara, United States of America💼 Full-time🗓 2026-04-27 → 2026-09-28

Core

Analyze silicon to extract intelligence on process technology, circuit design, memory architectures, and logic efficiency to inform Apple's silicon roadmap.

Role type

Senior IC power and performance engineer (silicon analysis)

Builds

Future Apple silicon products and SoC designs

Domain

Semiconductor industry + hardware architecture

Required skills

semiconductor physical analysis, deprocessing (chemical etch, mechanical polish, pFIB), SEM/TEM/FIB imaging, EDS characterization, logic and memory library identification, SRAM bitcell characterization, cache hierarchy estimation, silicon efficiency analysis, failure analysis coordination, image analysis, measurement, scripting (Python, shell)

Preferred skills

MS or PhD in EE/Materials Science/Physics, 10+ years industry experience, familiarity with floorplan layout, standard cell libraries, FinFlex configurations, metal stack identification, foundry/process technology differentiation, cross-functional presentation

Technologies

Python, shell, SEM, TEM, FIB, EDS

Responsibilities

Perform layer-by-layer deprocessing and imaging of SoCs, interpret physical images to identify logic/memory types, coordinate deprocessing campaigns with labs and vendors, produce reports and present findings to design teams, analyze silicon efficiency and cache hierarchies

Seniority

Senior, hands-on IC

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