Wireless MAC Design Engineer
Core
Design MAC layer for wireless communication SoCs, focusing on energy-efficient microarchitecture and RTL development.
Role type
Senior IC wireless MAC design engineer
Builds
Wireless communication System-on-Chips (SoCs)
Domain
Semiconductor / Wireless Communications
Required skills
Digital logic design, RTL coding (Verilog/SystemVerilog), RTL simulation and debug, Synthesis, Static Timing Analysis (STA), Lint, CDC/RDC analysis, ASIC microarchitecture
Preferred skills
Multi-clock-domain logic design, Wireless standards (IEEE 802.11, 802.15, Bluetooth, 3GPP), Low power design techniques
Technologies
Verilog, SystemVerilog, Synthesis tools, Lint tools, CDC/RDC tools, STA tools
Responsibilities
Prepare microarchitecture and RTL for digital logic based on functional requirements. Ensure lint, CDC, RDC cleanliness, and work with synthesis team on timing closure. Support verification/prototyping/emulation teams during pre-silicon phases. Support post-silicon validation, system integration, and debug efforts.
Seniority
Senior, hands-on IC
