SoC Full Chip DV Engineer
Core
Design Verification Engineer ensuring quality of Apple's System on Chip (SoC) or IP subsystems by developing test plans, tests, and coverage strategies.
Role type
SoC Full Chip DV Engineer
Builds
Apple's premier System on Chips (SoCs)
Domain
Semiconductor / Hardware Design
Required skills
Constrained random verification, functional coverage, code coverage, assertion methodology, Verilog/SystemVerilog, digital simulation and debug, computer architecture, digital design fundamentals
Preferred skills
UVM, C/C++, assembly, scripting languages (Perl/Python)
Technologies
UVM, Verilog, SystemVerilog, C, C++, Perl, Python
Responsibilities
Review design and architecture specifications, develop test plans and coverage strategies, run and triage regressions, track bugs, analyze coverage to achieve top results
Seniority
Entry-level (BS + 0 years)
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