Silicon Validation Software Engineer: CPU and Memory Hierarchy
Core
Develop functional validation software for CPUs, caches, and memory subsystems to identify logic and circuit bugs in Apple SoCs.
Role type
Senior IC silicon validation software engineer
Builds
System validation tools for Apple Silicon Engineering group
Domain
Semiconductor hardware validation (CPU, memory hierarchy, PVT)
Required skills
Post-silicon validation, PVT analysis, system bring-up, silicon debug, C/C++, Python scripting
Preferred skills
CPU microarchitecture knowledge, cache coherency expertise, SoC power/clocking/voltage domain knowledge, reliability characterization, cross-functional communication
Technologies
C, C++, Python
Responsibilities
Validate CPU cores, cache coherency, and memory hierarchy behavior on post-silicon platforms; Develop targeted stress tests to expose incorrect behavior under varying operating conditions; Partner with design teams to correlate silicon behavior with intended micro architectural design; Catch incorrect silicon behavior and issues before product release; Identify sensitivity to PVT shifts; Collect and analyze silicon data (logs, counters, traces) to understand system behavior; Provide actionable feedback to refine operating limits
Seniority
Senior, hands-on IC
