Senior Validation Engineer
Core
Develop validation strategies, requirements, environments, and methodologies for post-silicon verification, triage, and debug of CPU, SoC, and IP designs.
Role type
Senior Validation Engineer (Post-Silicon)
Builds
High-quality silicon validation results and debug solutions for CPU/SoC/IP products
Domain
Semiconductor hardware validation and debugging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
validation principles and techniques, test plan development, test content and script creation, post-silicon debugging, failure triage, cross-disciplinary taskforce leadership, high-speed IO knowledge, board level schematic understanding, system level software/firmware understanding, hardware/software debug, on-chip debug features (trace, JTAG), test equipment usage (protocol analyzers, bit error rate testers, logic analyzers, oscilloscopes)
Preferred skills
technical guidance and mentorship, continuous improvement of validation methodology, pre-silicon verification planning
Technologies
JTAG, trace, protocol analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes
Responsibilities
Develop validation strategy, requirements, environments, tools, and methodologies; write and implement test plans; execute content in post-silicon, triage, and debug failures; engage with partners to drive continuous improvement; provide technical guidance and mentorship; collaborate with architects, logic designers, and verification engineers; provide technical leadership with respect and integrity; apply expertise towards pre-silicon verification plans, tests, and debug
Seniority
Senior, hands-on IC with mentorship responsibilities
