Design Verification Engineer
Core
Verify functionality and performance of Apple's premier System-on-Chips (SOCs) and IP subsystems by developing test plans, tests, coverage plans, and next-generation verification methodologies.
Role type
Design Verification Engineer (SOC/Hardware)
Builds
Apple's premier SOCs and IP subsystems
Domain
Semiconductor hardware design and verification
Required skills
Verilog, SystemVerilog, digital simulation and debug, Python, Perl, C/C++, assembly, computer architecture, digital design fundamentals
Preferred skills
Ability to work independently, excellent interpersonal skills
Technologies
Verilog, SystemVerilog, Python, Perl, C/C++, assembly
Responsibilities
Review design and architecture specifications; develop test plans, tests, and coverage plans; define next-generation verification methodology and testbenches; collaborate with design, architecture, and software teams to understand use cases and corner conditions; run and triage regressions; track bugs; analyze coverage to achieve top results.
