IC Packaging Engineer
Core
Develop and deploy new packaging technologies for Apple products, interfacing between internal design, quality, supply chain, and external suppliers.
Role type
Senior IC Packaging Engineer
Builds
Advanced wafer bumping, wafer level chip scale packaging, fcCSP, and SiP integration solutions
Domain
Semiconductor manufacturing and IC packaging
Required skills
Wafer bumping, PM/RDL fan-in & fan-out, system-in-package integration, Cu RDL, polymer passivation, advanced node wafer singulation, die level process, chip on wafer hybrid, fusion bonding, root cause analysis, independent R&D
Preferred skills
Wafer level CSP, fcCSP, SiP applications in power management/baseband/RF, advanced silicon node BEOL, device physics, component/board level reliability testing, supplier management
Technologies
Wafer bumping, PM/RDL, SiP, fcCSP, Cu RDL, polymer passivation, fusion bonding
Responsibilities
Define package characteristics and specifications based on performance, cost, and footprint; coordinate with foundry, OSATs, and suppliers for process development; perform proof of concept builds, qualification, and reliability testing; manage supplier development activities and cross-functional teams to meet ramp schedules.
Seniority
Senior, hands-on IC
