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SRAM Compiler Circuit Designer

Munich, Germany💼 Full-time🗓 2026-08-06 → 2026-09-28

Core

Designing high-performance, low-power SRAM, register files, and latch arrays for Apple silicon processors.

Role type

Senior IC circuit designer (memory compiler)

Builds

ASICs for Apple hardware products

Domain

Semiconductor / Digital Logic Design

Required skills

SRAM compiler IP development, high-performance low-power circuit design, register file design, IC compiler knowledge, DFT integration, device physics understanding

Preferred skills

Schematic to layout SRAM design, post-silicon analysis, tape-out experience in latest nodes, ML-based programming algorithms, automation solutions

Technologies

IC compilers, circuit simulation tools, top-level integration tools, DFT tools

Responsibilities

Drive development of SRAM and latch arrays, lead SRAM compiler IP requirements, integrate compiler IPs into SOCs, collaborate with logic/architecture teams on specifications

Seniority

Senior, hands-on IC

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