Silicon Validation Engineer
Core
Lab characterization and validation of analog & mixed signal embedded circuits, specifically high-speed SerDes blocks, for mobile SoCs.
Role type
Senior IC silicon validation engineer (SerDes)
Builds
High-speed SerDes blocks (NRZ, PAM) for mobile System-on-Chips
Domain
Consumer electronics, analog/mixed-signal IC design
Required skills
SerDes architecture expertise (NRZ, PAM), CTLE, DFE, FFE, CDR, PLL characterization, high-speed protocol knowledge (USB, PCIe, DP), signal integrity analysis, test and measurement equipment operation (oscilloscopes, BERTs), debugging and problem-solving, test methodology development, PVT variation analysis
Preferred skills
Python programming, ATE support experience
Sourced via apple · Listed on CareerPlan, which tracks 855,000+ jobs from 20+ sources.