Senior Director, Engineering
Core
Lead the architecture, development, and delivery of advanced embedded memory IP solutions for semiconductor applications, serving as a senior technical partner to customers.
Role type
Senior Director, Engineering (Embedded Memory IP)
Builds
SRAM, ROM, register files, and dual-port RAM compilers for semiconductor applications
Domain
Semiconductor / Embedded Memory IP
Required skills
Embedded memory design, circuit design, memory compiler architecture, SPICE simulation, DFT, physical verification, Python/TCL/Perl scripting, Linux environments, AI tools, foundry partnership management
Preferred skills
Low-power memory design, multi-port memory architectures, TCAM, industry conference presentations
Technologies
SRAM, ROM, Verilog, Liberty (.lib), LEF, GDS, CDL, SPICE, FastSPICE, Tessent, FastScan, RedHawk, Python, TCL, Perl, Linux
Responsibilities
Lead architecture and circuit design of embedded memory compilers; Define key memory design elements including bitcell selection and assist circuits; Drive optimization of Vmin, leakage, performance, area, and yield; Own the technical roadmap for the memory portfolio; Establish design and verification methodologies; Lead silicon validation programs; Mentor and develop a team of memory design engineers; Act as senior technical lead in presales engagements; Translate customer SoC requirements into compiler specifications; Partner with sales and product teams on RFQs and technical evaluations; Lead technical workshops with customer architects; Own PPA analysis across the memory portfolio; Maintain competitive benchmarks against foundry and third-party memory IP; Conduct sensitivity and trade-off analyses; Develop customer-facing technical materials; Serve as primary technical contact for strategic customers; Lead integration debugging and root-cause analysis; Coordinate issue resolution across design and product teams.
Seniority
Senior Director, strategic leadership & hands-on technical expertise
