Physical Design Engineer II
Core
Responsible for physical design implementation and integration at block, subsystem, sub-chip, and full-chip levels to develop cutting-edge semiconductor products.
Role type
Senior IC physical design engineer (ASIC/SoC)
Builds
Complex ASICs in leading edge technology
Domain
Semiconductor / VLSI Design
Required skills
Floorplanning, Synthesis, Placement, CTS, custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, EM, Physical Design flow development/automation, Technology/IP/vendor selection
Preferred skills
None stated
Technologies
None explicitly listed
Responsibilities
Perform physical design tasks including floorplanning, synthesis, placement, CTS, custom clocking, routing, static timing, physical verification, formal equivalency, power efficiency, IR-drop, and EM; Develop and automate physical design flows; Evaluate and recommend technology, IP, and vendor selections; Provide status of progress, issues, and risks to management.
Seniority
Senior, hands-on IC
