Senior SoC HW Analog/Functional Validation Engineer
Core
Senior IC engineer responsible for post-silicon validation of SoC analog/functional areas (PLL, IO electrical/analog, high-speed interfaces) and silicon debug.
Role type
Senior IC hardware validation engineer (SoC Analog/Functional)
Builds
Custom SoC designs for cloud compute
Domain
Semiconductor / Hardware Engineering
Required skills
SoC architecture knowledge, high-speed IO interface expertise (PLL, PCI, CXL), silicon debug, validation strategy development, test plan creation, hardware/software co-design, Python/C/C++ scripting, analog circuit validation, power/performance analysis, FPGA/emulation experience, on-chip debug (JTAG, trace), test equipment usage (oscilloscopes, protocol analyzers)
Preferred skills
Pre-silicon verification experience, mentorship capabilities, cross-functional collaboration
Technologies
Python, C/C++, JTAG, FPGA, Emulation platforms, Oscilloscopes, Protocol analyzers, Bit error rate testers
Responsibilities
Own post-silicon validation of specific SoC areas (PLL, IO, functional), define and implement silicon debug tools, develop validation strategies and test environments, execute test content and triage failures, provide technical guidance to other engineers, engage with partners for design improvement, apply expertise to pre-silicon verification plans.
Seniority
Senior, hands-on IC
