Sr. Design Verification Engineer - Fabric Interconnect Performance
Core
Own performance verification of Fabric Interconnect subsystems, including traffic management, QoS, latency, bandwidth, and congestion scenarios.
Role type
Senior IC design verification engineer (fabric interconnects)
Builds
High-performance fabric interconnect subsystems and SoCs
Domain
Semiconductor hardware design and verification
Required skills
Performance verification of complex IPs/subsystems/SoCs, UVM verification environments, Formal verification, assertion-based verification, Python scripting, AI-assisted verification tools, traffic analysis, QoS management, latency/bandwidth analysis, visualization tools development
Preferred skills
Experience with fabric interconnects, coherency, CHI, AMBA, PCIe, CXL, protocol bridges, memory subsystems, bug discovery and root-cause analysis, automation methodologies, mentoring engineers
Technologies
UVM, Formal Verification, Python, CHI, AMBA, PCIe, CXL
Responsibilities
Define verification strategies, test plans, and signoff criteria; Develop performance analytics, monitors, scoreboards, and visualization tools; Drive bug discovery and root-cause analysis through simulation and formal analysis; Improve verification productivity through automation and AI-driven solutions; Coach and mentor engineers in verification methodologies
Seniority
Senior, hands-on IC
