Senior Silicon Engineer
Core
Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture requirements into high-quality hardware implementations.
Role type
Senior IC silicon engineer (RTL & microarchitecture)
Builds
Complex silicon blocks, subsystems, and SoCs
Domain
Semiconductor hardware design
Deliverable
production ML models | product features
Required skills
RTL design (Verilog/SystemVerilog), microarchitecture definition, design reviews, timing closure, low-power design, clock/reset architecture, CDC/RDC, synthesis readiness, hardware security (crypto engines, secure boot, trusted execution), AI-assisted design workflows, technical leadership, mentoring
Preferred skills
Experience with modern silicon development workflows, security-oriented subsystems
Technologies
Verilog, SystemVerilog
Responsibilities
Define interfaces, debug complex issues, manage technical risks, contribute to subsystem integration, act as a technical leader and mentor
Seniority
Senior, hands-on IC
