Senior Design Engineer - IP Office
Core
Lead IP selection, qualification, acquisition, and integration for AI SoC programs, ensuring alignment with product requirements and SoC landing zones.
Role type
Senior Design Engineer - IP Office (AI SoC)
Builds
AI System-on-Chip (SoC) products integrating third-party and internal IPs
Domain
Semiconductor / AI Hardware / SoC Design
Deliverable
production ML models | product features
Required skills
IP selection and qualification, IP acquisition (license/SOW), release management, quality assurance, pre/post-silicon validation, cross-functional integration, trade-off optimization, tape-out management, IP collaterals management, high-speed serial/parallel IO integration, memory subsystem integration, scripting (Python/Perl), front-end/back-end IP integration flows, vendor and foundry management
Preferred skills
Experience with 112G/224G Ethernet, PCIe 5/6, HBM3/4, temperature/voltage/process monitors
Responsibilities
Drive IP selection, qualification, and adoption for AI SoC programs; Lead IP acquisition, release management, QA, and integration; Establish and scale processes for IP release, updates, and validation; Partner with Architecture, PD, DFT, and Validation teams to optimize design tradeoffs; Drive cross-functional resolution of pre- and post-silicon IP issues; Provide technical leadership through stakeholder engagement across engineering organizations and vendors
Seniority
Senior, hands-on IC
