ASIC Senior Principal Engineer : Design Veirifcation
Core
Leads a team of individual contributors and project teams responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing.
Role type
Senior Principal Manager (VLSI Design & Verification)
Builds
Complex integrated circuits and VLSI solutions
Domain
Semiconductor / Hardware Engineering
Required skills
VLSI architecture and logic design, design verification via simulation, physical implementation and layout, team leadership, project management, stakeholder management, strategic planning, resource allocation, performance management
Preferred skills
Advanced university degree, 5+ years of people management experience
Technologies
VLSI design tools, simulation software, layout development tools
Responsibilities
Provide leadership and direction for VLSI design and development teams; Manage headcount, deliverables, schedules, and costs for multiple VLSI projects; Manage relationships with VLSI partners and suppliers; Engage with program managers, marketing, supply chain, and executives to guide strategic decision-making; Own lab-wide process improvement and cost optimization; Build the organization's technical and management capabilities by hiring top VLSI talent.
Seniority
Principal, management & strategy
