Barkhausen Institut gGmbH: Senior Engineer “Digital Hardware-Design” (m/w/d)
Core
Designing, developing, and integrating digital hardware architectures for ASIC and FPGA designs to build a secure and dependable multiprocessor system-on-chip (MPSoC) for connected electronic systems.
Role type
Senior IC digital hardware design engineer (ASIC/FPGA)
Builds
Secure multiprocessor system-on-chip (MPSoC) hardware platforms
Domain
IoT, hardware security, embedded systems
Required skills
ASIC design, FPGA design, RTL design (Verilog/VHDL), EDA tools (Cadence, Synopsys), Python, hardware architecture definition, simulation and verification, CI/CD pipeline management
Preferred skills
Processor systems knowledge, hardware security knowledge
Technologies
Verilog, VHDL, Python, Cadence, Synopsys, Git, CI/CD
Responsibilities
Designing and integrating digital hardware architectures for ASIC and FPGA; Independently defining and leading hardware architecture concepts; Implementing, simulating, and verifying digital hardware on RTL level; Supporting FPGA prototyping and ASIC front-end design through to tape-out; Collaborating with backend teams to analyze and optimize RTL designs; Creating design and verification documentation; Setting up and managing Git flows and CI/CD pipelines
Seniority
Senior, hands-on IC
