ASIC Design Engineer, Cloud ML Acceleration
Core
Design and implement high-performance, power-efficient RTL and microarchitectures for custom SoCs powering AWS machine learning servers.
Role type
Senior IC ASIC Design Engineer (Cloud ML Acceleration)
Builds
Custom System on Chips (SoCs) for AWS Inferentia and other ML server infrastructure
Domain
Cloud computing, Machine Learning, Hardware Acceleration
Deliverable
production ML models | product features
Required skills
ASIC design, SystemVerilog, RTL design, microarchitecture design, timing analysis, power optimization, area optimization, linting, clock-domain-crossing checks
Preferred skills
High-performance design, power-efficient design, interconnects, DMAs, memory subsystems, accelerator engines, system-level architectures, patent generation
Technologies
SystemVerilog, AWS Cloud
Responsibilities
Design and implement efficient RTL meeting project specifications; Analyze designs and microarchitectures to balance features, power, performance, and area; Create microarchitectures and write SystemVerilog RTL; Run lint and clock-domain-crossing checks to protect design integrity; Collaborate with architects, verification partners, and back-end specialists.
