PCB Layout Engineering Lead
Core
Lead the physical implementation of complex, high-performance printed circuit boards for AI systems, optimizing signal integrity, power integrity, thermal performance, and manufactability.
Role type
Senior IC PCB Layout Engineering Lead
Builds
Production-ready PCBs for AI accelerators, server hardware, and datacenter platforms
Domain
Hardware engineering, AI infrastructure, high-speed digital/analog design
Deliverable
production ML models | product features
Required skills
Multilayer PCB layout, controlled-impedance routing, signal integrity (SI), power integrity (PI), thermal design, DFM/DFA/DFT, IPC standards, BGA escape routing, HDI structures, high-speed interface routing
Preferred skills
High-layer-count board design, DDR4/DDR5/PCIe Gen4/Gen5 routing, high-current power delivery, Allegro SKILL scripting/automation
Technologies
Cadence Allegro PCB Designer, Constraint Manager, Altium Designer
Responsibilities
Own multilayer PCB layout from component placement to fabrication release; define stackups and routing rules; place and route high-speed digital, power, and analog circuits; collaborate with SI/PI, mechanical, and thermal engineers; manage fabrication and assembly partner validation; perform design reviews and generate release packages.
Seniority
Senior, hands-on IC
