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ASIC Firmware Engineer, Modeling

San Francisco💼 Full-time🗓 2026-02-03 → 2026-07-31

Core

Designing and developing drivers, functional models, and low-latency firmware for OpenAI's in-house AI accelerator silicon.

Role type

Senior embedded firmware engineer (ASIC/HW-SW co-design)

Builds

Firmware drivers, functional simulation models, and embedded software for AI accelerator chips

Domain

AI hardware / Silicon design / Embedded systems

Deliverable

production ML models | product features | infrastructure

Required skills

C/C++ programming, Rust, RTOS development, hardware driver development, HW/SW co-design, embedded protocols (UART, I2C, SPI), multi-threaded code optimization, SoC uncore logic modeling

Preferred skills

ARM architectures (AMBA), PCIe/ethernet protocols, GPU/compute hardware experience, large compute cluster deployment

Technologies

C, C++, Rust, RTOS, ARM, PCIe, Ethernet, UART, I2C, SPI

Responsibilities

Design and implement drivers for hardware peripherals; Design and implement functional software models to simulate SoC uncore logic; Design and implement low-latency embedded SW to manage HW resources; Debug firmware/driver on new platforms; Set up monitoring, integration testing and diagnostics tools

Seniority

Senior, hands-on IC

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