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ASIC Architect

San Jose💼 Full-time🗓 2025-08-05 → 2026-09-25

Core

Design and optimize compute architectures for next-generation AI accelerators focused on inference workloads, delivering high throughput and low latency.

Role type

Senior IC Computer Architect (ASIC/AI Accelerator)

Builds

Custom AI inference chips and accelerator subsystems

Domain

Semiconductor hardware design / AI Infrastructure

Deliverable

production ML models

Required skills

Computer architecture fundamentals, performance modeling, floating-point datapath design, advanced process node optimization, Rust/C++/Python for analysis

Preferred skills

AI/ML accelerator dataflow optimization, RTL design (Verilog/SystemVerilog), cycle-accurate simulation (gem5/SystemC), ASIC tapeout experience, microarchitecture tradeoffs

Technologies

gem5, SystemC, Verilog, SystemVerilog, Rust, C++, Python

Responsibilities

Design and analyze chip architectures for AI/ML workloads, create architectural specifications and interface definitions, conduct architectural experiments using simulators, collaborate with RTL/verification/physical design teams, support integration efforts by resolving design challenges

Seniority

Senior, hands-on IC

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